This paper describes the properties of pin Ge1-ySny diodes (y=4.4-10% Sn) grown directly on Si(100) wafers as a way to investigate the impact of eliminating the Ge buffer layers used conventionally for the integration of GeSn devices on Si. The technology offers a simplified and potentially lower-cost alternative for SWIR-LWIR applications. Two device designs are discussed. The first design adopts a layer sequence n-Ge1-ySny/i-Ge1-ySny/p-Ge1-ySny/Si, featuring a single defected bottom interface between the p layer and the Si wafer. This was followed by an even simpler n-Ge1-ySny/i-Ge1-ySny /p-Si heterostructure design. In both cases, the top i/n interface is pseudomorphic and potentially defect-free. The Ge1-ySny layers are produced by CVD reactions of Ge3H8 and SnH4 at temperatures ranging from 300 o C to 390 o C. The n-type electrodes in the samples were doped with As using As(SiH3)3, and the p-type GeSn layers were doped using diborane as the source of B-atoms. All samples were characterized by XRD, RBS, IR-ellipsometry, AFM and TEM. The layers were found to be monocrystalline single-phase alloys exhibiting mostly relaxed strain states and top surfaces devoid of the cross-hatch surface patterns that are typical of Ge1-ySny films grown on Ge buffers. Current voltage I-V curves of fabricated devices over the 4.4-10% Sn range of interest showed that rectifying behavior is readily attained. It appears that the effect of eliminating the Ge-buffer is an increase of only one order magnitude in the density of defects responsible for the dark current, together with an increase in residual doping in the nominally intrinsic layer. The results suggest that these deleterious effects may be further reduced with improved sample designs, particularly at high Sn-concentrations, opening up new alternatives for the effective integration of GeSnand Si technologies.