Design and verification of two-and three-pole differential bridged T-coils applicable to wideband and high-speed integrated circuits, broadband I/O terminations, capacitive loads, and ESD protection circuits are described. T-coil prototypes with 50-Ω terminations, designed for maximally flat amplitude (MFA) and envelope delay (MFED) responses, are characterized. Measured transimpedance bandwidth and group delay of the two-pole MFA design are 43.2GHz and 7±2ps across 45GHz, respectively. The bandwidth extension ratio (BWER) is 2.43x compared to an unpeaked R-C circuit. The three-pole MFED T-coil realizes a 2.2x BWER, with 23-GHz bandwidth and 12±2-ps group delay across 30GHz. Implemented in 22-nm FD-SOI CMOS technology, the T-coils occupy 224 x 215µm^2 .