In this letter, an ultra-low-power power-on-reset circuit with reconfigurable trip-voltages is proposed. In order to reduce area and power consumption overhead, an all-MOS sub-threshold architecture based on threshold difference voltage references and current comparator is designed. By configuring the reference current and the different threshold transistors, the different trig voltages are generated to detect multi-supply voltages. Simulation results based on 55 nm CMOS process show that the proposed power-on-reset circuit generates trip voltages of 385.5 mV and 775.4 mV, consuming only 8.5 nA and 92.6 nA at the supply voltage of 0.5 V and 1 V, respectively. And the area of the proposed power-on-reset circuit is as low as 240 μm².