In this paper, a low power transconductor-capacitor (Gm-C) filter with programmable cutoff frequency is designed for electroencephalogram (EEG), electrocardiogram (ECG), and surface electromyography (sEMG) biosignals. The second order Butterworth low pass filter (LPF) is designed as an interface between an instrumentation amplifier (IA) and analog to digital converter (ADC). The proposed Gm-C filter suppresses out of band components and also plays anti-aliasing role. With the variable transconductance based on flipped voltage follower (FVF), the cutoff frequencies of 100 Hz, 560 Hz, and 1.5 kHz are obtained for EEG, ECG, and sEMG, respectively. This structure has highly accurate by using a robust and low power common mode feedback (CMFB). With 0.8 V supply voltage, the total power consumption of the filter is only 56 nW, 100 nW, and 221 nW for cutoff frequencies of 100 Hz, 560 Hz, and 1.5 kHz, respectively. The proposed Gm-C filter is simulated in TSMC 65 nm CMOS technology and occupies an area of 0.12 mm2. The figure of merit (FOM) of the proposed filter is equal to 1.9 pW/pole.

Nowadays, Z-source inverter has received several attentions compared to the other power converters owing to its simplicity and reliability. In this paper, a refine control methodology of capacitor voltage control is presented based on third-order small signal analysis. The proposed control is applied to the improved switched inductor Z-Source inverter (ISL ZSI). Proportional, integral and derivative controller (PID) is adopted due to its capability to operate with large operation levels , reliable operation, and cheaper in implementation. In addition, the function of this control can be achieved even with incomplete system data or parameters variations. ISL-ZSI has been presented because of its advantages such as the high gain of DC voltage, low voltage stress for both the Z-network and the inverter bridge switches and ensure good soft starting. in addition, the inrush current has been removed based on its configuration. The proposed control is validated by both experimental and simulation results under input voltage change, load change, and steady state operations using DSP F28335 and MATLAB SIMULINK Real-Time Workspace (RTW).

In this work a self-configuration system and the frequency characterization for a fully integrated CMOS photodetector sensor is presented. The sensor is composed of pixels with programmable switches that allow each pixel to connect with its neighbors; in this way, an arbitrary detection pattern can be synthesized on it. The design was aimed to be part of an optical encoder based on a non-diffractive light beam, therefore, the purpose of the self-configuration routine is to find the center of the incident non-diffractive beam and then configure the detection pattern around it. The corresponding algorithm is implemented on a Zynq-7000 SoC allowing to automate the alignment of the beam with the detection pattern, without using micrometric positioning procedures. The frequency response of the analog front-end of the entire chip (the pixels and the amplification system) is addressed via SPICE simulations and experimental data, and is consistent with the classical mathematical models, allowing us to propose future improvements to the design.

A novel capacitor voltage-reduced bidirectional (CVRB) PWM DC-DC buck-boost converter is presented in this study. Compared to the conventional bidirectional buck-boost converter, the proposed converter has a lower voltage rating filter capacitor. Accordingly, the given converter has a lower cost and 3.3% higher power density than the conventional buck-boost converter. Additionally, the proposed converter is more efficient due to the direct power transfer feature. Besides, the semiconductor switches have no extra voltage/current stress. The theoretical analysis of the converter is made, and its mathematical analysis is presented. The novel converter is experimentally operated in both the buck and boost modes. The experimental waveforms are shown for both operations. The proposed converter is operated in 100 W output power and 20 kHz switching frequency conditions.

The standard van Neumann computer excels at many things. However, it can be very inefficient in solving optimization problems with a large solution space. For that reason, a novel analog approach, the oscillator-based Ising machine, has been proposed as a better alternative for dealing with such problems. In this work, we review the concept of oscillator-based Ising machines. In particular, we address how optimization problems can be mapped onto such machines when the QUBO formulation is given. Furthermore, we provide an ideal circuit that can be used in combination with the wave digital concept for real-time simulated annealing. The functionality of this circuit is explained on the basis of a Lyapunov stability analysis. The latter also provides an answer for the question: when has the Ising machine solved a mapped problem? At the end, we provide emulation results demonstrating the correlation between functionality and stability of the discussed machine. These results show that mapping a problem onto an Ising machine effectively maps the solution of the problem onto an equilibrium of the phase space.